A Topology for High Voltage Gain Half-Bridge Z-Source Inverter with Low Voltage Stress on Capacitors
Authors: M. Nageswara Rao
In this paper, a topology for high voltage gain half-bridge z-source inverter with low voltage stress on capacitors is proposed. The proposed inverter has only one impedance network. It can generate symmetric and asymmetric voltages with different magnitudes during both half-cycles. By selecting the duty cycle it can also produce conventional half-bridge inverter characteristics. It is used in special applications like, electrochemical and electro plating applications. Calculations of voltage ripple of capacitors, capacitors voltage stress inductors current ripple are presented. The proposed topology is simulated using PSCAD software and the simulated values are compared with the theoretical values.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.2643669Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 263
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