WASET
    Mojtaba Valinataj,  Design of Parity-Preserving Reversible Logic Signed Array Multipliers.   journal   = {International Journal of Physical and Mathematical Sciences}, [online]. World Academy of Science, Engineering and Technology.
    May 2017, vol. 127(7). 260 - 267
    [viewed 19 April 2024]. Available from: https://publications.waset.org/pdf/10007406.